PME Distinguished Colloquium - Jeehwan Kim

Seamless wafer-free monolithic 3D integration enabled by confined growth and remote epitaxy

3D heterogeneous integration, which involves vertically stacking wafers with embedded electronic devices, is emerging as the leading approach for augmenting the performance of electronics and optoelectronics. This method, however, demands complex procedures including creating through-silicon vias (TSVs), filling these vias with copper, and bonding the wafers via micro-bumps or Cu hybrid bonding.